Silicon Engineer, System Level Testing Volume Ramp, Silicon
- linkCopy link
- emailEmail a friend
Google welcomes people with disabilities.
Minimum qualifications:
- Bachelor's degree in Computer Science or Electrical Engineering, or equivalent practical experience.
- 3 years of experience in silicon bring-up or validation, debugging post-silicon issues and developing silicon tests.
- Experience programming in C.
Preferred qualifications:
- Master's degree or PhD in Computer Science, Electrical Engineering, or related domains.
- Experience with embedded software development and related toolchains, or software debug tools (e.g. GDB) and hardware debug tools (e.g. JTAG/TRACE32).
- Experience with Android, Embedded Linux, RTOS, or bare metal software.
- Experience with Python programming.
- Experience in factory testing.
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a member of the Google Tensor team, you will enable the system level testing methodology for volume ramp. You will contribute to test planning, integration, stabilization, and debugging on a variety of post-silicon platforms. You will collaborate with many IP teams to support the Product Development and Test Engineering (PDTE) team on volume ramp tasks. You will build a deep understanding of the post-silicon characterization and use it to improve the factory yield.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Contribute to test planning, test development/stabilization, and error debugging to support the silicon volume ramp at the system level.
- Support the PDTE team on silicon volume ramp tasks.
- Collaborate with Design and Validation leads to support the system level testing platform.
- Collaborate with internal test engineers and partner engineers on screening parts and debugging RMAs.
- Collect the post-silicon characterization data to improve the production quality and yield.
Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy.
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.
If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.