Physical Design and Implementation Engineer, ASIC
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 2 years of experience with physical design methodology and flow validation/development methodology.
- Experience in floor planning and physical design tool automation with PnR tools and scripting in Tcl/Perl/Shell/Python.
Preferred qualifications:
- Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience on Place-and-Route tools (i.e., Innovus and Fusion Compiler) automations.
- Experience with synthesis to floor planning, and place and route bring-up with construction strategies.
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Develop all aspects of ASIC RTL to Graphic Data Stream (GDS) implementation for high Power Performance Area (PPA) designs.
- Manage block and full-chip level physical implementation and Quality of Results (QoR), including timing and area.
- Collaborate with cross-functional teams (technology, signoff validation teams) to develop methodology for Physical design.
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