Silicon, Physical Design Engineer, Google Cloud
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Minimum qualifications:
- Bachelor’s degree in Electrical Engineering or equivalent practical experience.
- 4 years of experience with design, clock/voltage domain crossing, Design for Testing (DFT), and low power designs.
- Experience with System on a Chip (SoC) cycles.
- Experience in high-performance, high-frequency, and low-power designs.
Preferred qualifications:
- Master’s degree in Electrical Engineering.
- Experience in coding with System Verilog and scripting with TCL.
- Experience with layout verification and design rules.
- Experience in VLSI design in SoC.
- Experience with multiple-cycles of SoC in ASIC design.
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.In this role, you will be part of a team developing cutting-edge ASICs used to accelerate machine learning computation in Data centers. You will collaborate with members of architecture, verification, power and performance, physical design, and more to specify and deliver high quality designs for next generation data center accelerators. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power, and area in mind.Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
- Take ownership of one or more physical design partitions and/or top level.
- Drive to the closure of timing and power consumption of the design.
- Contribute to design methodology, libraries, and code review.
- Define the physical design related rule sets for the functional design engineers.
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