Silicon Engineer, Video Codec Accelerators, YouTube
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
- 3 years of ASIC digital design experience, including Verilog.
- Experience with C++ or Python.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with digital design architecture for silicon IPs.
- Experience in digital design, verification, and implementation of IPs.
- Experience in working with chip top level architecture.
- Experience in image processing, computer vision, or video compression domains.
- Experience with high-level synthesis (HLS) tools and methodologies, such as Vivado and Catapult.
About the job
The team leads the research and development of cost effective video processing and compression custom low-power accelerators. The team works with industry leads across YouTube, Google (e.g., Research, Chrome Open Codecs, Core and Technical Infrastructure) and top academic research groups. The team also develops the next generation of ultra-efficient video processing and compression accelerators that will be used in Google’s data center video compression chips used by multiple products and users such as YouTube, Drive, Photos, and Meet as well as next generation video compression standards.
At YouTube, we believe that everyone deserves to have a voice, and that the world is a better place when we listen, share, and build community through our stories. We work together to give everyone the power to share their story, explore what they love, and connect with one another in the process. Working at the intersection of cutting-edge technology and boundless creativity, we move at the speed of culture with a shared goal to show people the world. We explore new ideas, solve real problems, and have fun — and we do it all together.
The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Implement video processing and compression algorithms in hardware using Synthesis and C++ to describe the hardware.
- Design architectures for silicon IPs.
- Measure and optimize power-performance-area profile of silicon IPs.
- Work with chip architects to optimize the chip- and system-level resource usage.
- Work with key stakeholder teams in YouTube and Google and at various research organizations, and participate in dreaming up next generation innovations.
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