RTL Microarchitecture Lead, AI/ML, Silicon, Google Cloud
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Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 16 years of experience in RTL design, verification, and logic synthesis.
- Experience in VLSI CAD methodology and tool development.
- Experience solving engineering problems with AI/ML algorithms and techniques.
Preferred qualifications:
- Experience with Electronic Design Automation (EDA) tools in design, verification, DFT and implementation.
- Understanding of design, layout, constraints (e.g., SDC, Clocks, CDC, RDC), Static timing analysis, Low-power, and Power-aware flows (e.g., UPF).
- Understanding of System Verilog, Verilog, VHDL, front-end design, physical design and layout implementation, generation flows and tools.
About the job
In this role, you will lead and inspire a team of RTL design engineers and AI/ML specialists, empowering them to develop and deploy innovative solutions that redefine how we design, verify, and optimize complex digital circuits. By leveraging cutting-edge research and collaborating across hardware and software teams, you will enable faster design cycles, higher quality designs, and hardware products that deliver exceptional experiences to the users.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
- Work closely with Google DeepMind team on AI models (e.g., large language model (LLM), Gemini and other Machine Learning tools). Stay up-to-date on the latest advancements in AI/ML and RTL design methodologies.
- Identify and implement novel AI/ML based approaches to improve RTL design processes, including logic optimization, verification, and power analysis.
- Create custom AI/ML tools and integrate existing ones into Google's Register-Transfer Level (RTL) design flow, enabling automation, faster design cycles, and improved design quality. Develop reusable and testable software components for use in a large existing code base, optimize existing components.
- Partner with hardware architects, verification engineers, and software teams to ensure seamless integration of AI/ML driven solutions into the overall product development cycle.
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