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    1,542 jobs matched

    • Senior CPU Performance Architect

      GoogleMountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Google | Mountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 8 years of experience with microprocessor architecture, micro-architecture, performance, and design.
      • Experience with performance modeling, analysis, correlation, and workload characterization, as well as experience with CPU architecture (e.g., CPU block).

    • Staff CPU RTL Design Engineer, Silicon

      GoogleAustin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Google | Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 10 years of experience with CPU or AI accelerator logic/RTL design, including microarchitecture definition and PPA optimizations.
      • Experience with post-silicon CPU validation and hardware debugging, specifically for mobile device chips (phone-class SoCs).
      • Experience with RTL languages (System Verilog) and standard design processes (e.g., Lint, UPF).

    • CPU Architecture and Performance Engineer

      GoogleMountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Google | Mountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 1 year of experience in high-performance microprocessor architecture, microarchitecture, performance, and design.
      • Experience in performance modeling, analysis, correlation, and workload characterization, with experience in C/C++ and scripting languages, e.g. Python.

    • CPU Lead Performance Architect, Silicon

      GooglePortland, OR, USA; Austin, TX, USA; +3 more; +2 more

      Google | Portland, OR, USA; Austin, TX, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 10 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
      • Experience in C/C++ and scripting languages.
      • Experience in performance modeling, analysis, correlation, and workload characterization.
      • Experience with high-performance CPU architecture.

    • Staff CPU RTL Designer, Silicon

      GoogleMountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Google | Mountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 10 years of experience in CPU or AI accelerator logic/RTL design, including microarchitecture definition and PPA optimizations.
      • Experience with RTL language (System Verilog) and related design processes (e.g., Lint, UPF).

    • CPU RTL Engineer, Silicon

      GoogleAustin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Google | Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 4 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
      • Experience with microprocessor architecture.

    • Senior CPU RTL Engineer, Silicon

      GoogleMountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Google | Mountain View, CA, USA; Austin, TX, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
      • Experience with logic synthesis techniques to optimize RTL code, performance and power including low-power design techniques.

    • Senior CPU Performance Architect

      GoogleNew Taipei, Banqiao District, New Taipei City, Taiwan

      Google | New Taipei, Banqiao District, New Taipei City, Taiwan

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
      • 8 years of experience in microprocessor architecture, micro-architecture, performance, or advanced CPU design.
      • Experience in CPU architecture, performance modeling, analysis, correlation, and workload characterization.
      • Experience with C/C++ and scripting languages (e.g., Python).

    • Senior CPU Formal Verification Engineer, Silicon

      GoogleAustin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Google | Austin, TX, USA; Mountain View, CA, USA; +3 more; +2 more

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 8 years of experience verifying digital logic at RTL using SystemVerilog for ASICs.
      • Experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).
      • Experience with one or more Design Verification industry formal verification tools (e.g., JasperGold, VC Formal, Questa Formal, 360-DV, etc.).

    • CPU Performance Architect, Silicon

      GoogleNew Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Google | New Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science, emphasizing in Computer Architecture, or equivalent practical experience.
      • 4 years of experience in microprocessor architecture, microarchitecture, performance, or advanced CPU design.
      • Experience with C/C++ and scripting languages (e.g., Python).
      • Experience in CPU architecture, performance modeling, analysis, correlation, and workload characterization.

    • CPU Workload Analysis Researcher, PhD Graduate, Google Cloud

      GoogleTel Aviv, Israel; Haifa, Israel

      Google | Tel Aviv, Israel; Haifa, Israel

      Minimum qualifications

      • PhD in Electrical and Electronics Engineering, or equivalent practical experience.
      • 2 years of experience with software development in C++ programming language.
      • 1 years of experience with data structures or algorithms.

    • CPU Workload Analysis Researcher, PhD Graduate, Google Cloud

      GoogleHaifa, Israel; Tel Aviv, Israel

      Google | Haifa, Israel; Tel Aviv, Israel

      Minimum qualifications

      • PhD degree in Electrical and Electronics Engineering, or equivalent practical experience.
      • 2 years of experience with software development in C++ programming language.
      • 1 years of experience with data structures or algorithms.

    • CPU Verification Engineer, Silicon

      GoogleBengaluru, Karnataka, India

      Google | Bengaluru, Karnataka, India

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 4 years of experience in modern CPU architectures, with particular emphasis on ARM-based microarchitectural features.
      • Experience with AMBA buses like CHI (Coherent Hub Interface) and ACE (AXI Coherency Extensions), as well as cache coherency protocols.

    • Senior CPU Design Verification Engineer, Silicon

      GoogleNew Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Google | New Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • 8 years of experience in functional verification, performance validation, developing test plans and diagnostic codes of modern processors.
      • Experience with processor microarchitecture.

    • CPU Frontend Design Engineer, Hardware, Google Cloud

      GoogleTel Aviv, Israel; Haifa, Israel

      Google | Tel Aviv, Israel; Haifa, Israel

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Science, a related technical field, or equivalent practical experience.
      • 4 years of experience in full VLSI design cycle.
      • Experience in VLSI development with Verilog, SystemVerilog, System Verilog Assertions (SVA), or VHDL, and with design verification, synthesis, timing/power analysis, and DFT.
      • Experience in RTL implementation of low power designs.

    • CPU Digital Design Manager, Silicon

      GoogleBengaluru, Karnataka, India

      Google | Bengaluru, Karnataka, India

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 15 years of experience with leading design teams.
      • Experience in one or more of the following sub-systems: CPU cores (e.g., ARM), GPU graphics processors, HSIO protocols (e.g., PCIe, UFS, LPDDR), or LSIO peripherals.

    • CPU Design Verification Engineer

      GoogleNew Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Google | New Taipei, Banqiao District, New Taipei City, Taiwan; Zhubei, Zhubei City, Hsinchu County, Taiwan

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 4 years of experience with verification methodologies and languages such as Universal Verification Methodology (UVM) and SystemVerilog.
      • Experience developing and maintaining verification test benches, test cases, and test environments.

    • Senior CPU Physical Design Engineer, Silicon

      GoogleMountain View, CA, USA; Austin, TX, USA

      Google | Mountain View, CA, USA; Austin, TX, USA

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
      • 5 years of experience with physical design flow such as constraints, synthesis, floor planning, place and route, clock tree synthesis (CTS), or physical verification.
      • Experience in one or more sign-off convergence areas.
      • Experience in design, including implementation and Power Performance Area (PPA), leveraging industry-standard tools.

    • CPU Design Verification Engineer, PhD University Graduate, 2025 Start

      GoogleTel Aviv, Israel; Haifa, Israel

      Google | Tel Aviv, Israel; Haifa, Israel

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
      • Experience creating and using verification components and environments in standard verification methodology.
      • Experience verifying digital logic at Register Transfer Level (RTL) level using SystemVerilog or Specman/E for Field Programmable Gate Arrays or ASICs.

    • Junior CPU Formal Verification Engineer, Google Cloud

      GoogleTel Aviv, Israel; Haifa, Israel

      Google | Tel Aviv, Israel; Haifa, Israel

      Minimum qualifications

      • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
      • 1 year of experience capturing design specification in a temporal assertion language (e.g., SVA or PSL).
      • Experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
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